Pulse width modulated (PWM) signal generators are used in many kinds of circuits, including embedded controllers, audio processors, and motor control circuits. In general, a PWM signal generator employs a phase-locked loop circuit that generates a rectangular clock signal from a system clock signal and a PWM controller for producing a PWM signal from the rectangular clock signal and a modulating signal. In general the PWM controller is peripheral to a processor and can module the PWM signal by changing period and width values from a user program.
In the case where both period and width values of a PWM signal are to be controlled, it is necessary for the processor to manage the timing of the write of both the period and width values so as to prevent the PWM signal from being generated at undesired times and combinations of period and width values. In addition, changing the period and width values on-the-fly can result in distortion in the form of undesired timing of the PWM waveform and can also result in undesired combinations of period and width values. These drawbacks can make the current PWM waveform generators unsuitable for critical real-time applications.
A type of current PWM waveform generator, which attempts to generate a reliable PWM waveform when both the period and width values are to be controlled, generates a PWM signal depending on a sequence of combinations of period set and width set values which are received from a controller. The above PWM waveform generator utilizes two registers for the period value and another two registers for the width value. A write history flag controls a transfer permit signal to move the period and width values from one set of registers to the next.
One potential problem with the above PWM waveform generator is that it fails to generate the desired waveform when the period and width updates/changes occur on opposite sides of a PWM cycle boundary. Further, the technique does not respond to the updates to provide desired wave forms when the period and width updates continue to occur on opposite sides of the PWM cycle boundary in successive PWM cycles. When generating a PWM waveform, period and/or width updates occur generally in almost every cycle of a PWM signal. If the period and width updates occur on opposite sides of the PWM cycle boundary in each cycle of the PWM signal, then the updates/changes never get implemented by the above-described PWM waveform generator.
It is generally difficult to control the updates to occur at a desired location in a PWM waveform cycle (to occur simultaneously or within a PWM cycle boundary) sequentially when writing to the registers using software running on a processor. It is even more difficult, when using a software program running on a processor, to control the period and width updates to occur at a desired location when the changes have to be made on-the-fly. In addition, adding extra features to the software to monitor and control the timing of the period and width updates increases the load on the processor when the processor is in operation. Therefore, the technique falls short of reliably generating a desired real-time high frequency PWM waveform.